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For applications with high safety requirements
optimized automotive grade open-source based C/C++ compiler
HighTec's multi-architecture and multi-core C/C++ compiler suite with leading optimization technology
Key Features Of The Safety Multi-Core Development Suite
HighTec leading optimization technology.
Advanced multi-core support at linker level.
Customer-specific Frozen Versions.
Long-term maintenance & availability.
Advanced bug scanning support.
Hide-and-visibility concept – interfaces between cores on linker level.
The proprietary solution for migrating to multi-core.
Application code can be ported to multi-core without source code modification.
Proven software can be easily migrated to multi-core silicon.
Based on linker level (ISO and EABI compliant) – a proprietary solution for migrating to multi-core.
Support of homogenous and heterogeneous Multi-Core architectures.
TriCore / AURIX
ARM
RISC-V
Power Architecture
GTM/MCS
MetaWare for AURIX
TriCore / AURIX
- Full and complete support for all AURIX familiy: TC2x, TC3x and TC4x. Further info here
- Proven GCC based C/C++ TriCore compiler for TC2x and TC3x
- Widely used, modern and efficient LLVM based C/C++ TriCore compiler for TC3x and TC4x
- Leading in benchmark results for TriCore
- C/C++ MetaWare tool and SW set for PPU in TC4x family
- C compiler for HSM in TC2x and TC3x
- C compiler for standby controller (SCR) in TC2x, TC3x and TC4x
- ISO 26262 ASIL D qualification kit
- Highly efficient code generation utilizing unique TriCore HW features (SIMD, loop optimization)
- AUTOSAR MCAL driver support (including sales and on-site training)
- Support for AUTOSAR BSW from all relevant AUTOSAR vendors such as Vector, Elektrobit or ETAS
- Easy system integration with PXROS-HR safety multicore OS and iLLDs, MCALs, SafeTlib/ SafeTPack, etc.
- Infineon Preferred Design House (PDH) with comprehensive technical support and training offerings and one-stop-shop for compilers and software
ARM
- C/C++ compiler for Cortex Mx/Rx/Ax
- Support for NXP S32-series, ST Stellar (Cortex-Mx, Cortex-R52), Infineon TRAVEO II, TI Cortex-Rx series, Renesas ARM and many more
- Auto-Vectorizer and Advanced Neon instructions (SIMD)
- Adaptive AUTOSAR support (C++14)
- Link-time optimization
- Pipe-line optimization
- Shared library support
- Thumb2 instruction set
- VFP support
- Cortex M3/M4 support (incl. AURIX HSM)
- C compiler for GTM/MCS
RISC-V
- Full support for RISC-V cores
- Based on the latest LLVM technology
- ISO 26262 ASIL D safety qualified
- Zb* extensions for bit manipulation
- Zv* extensions for vector instructions
- Supports language standards (C++14/C++17)
- Short build times, high code density, fast execution speed
Power Architecture
- STMicroelectronics SPC56x, SPC57x, SPC58x
- NXP Qorivva MPC56xx, MPC57xx, MPC58xx
- Supporting VLS, SAT, LSP and pipeline optimized dual issue
- Mix of NON-VLE and VLE var. length encoding instructions
- Legacy NON-VLE to equivalent VLE code translation
- Small Data Pointer functionality: about 20% code and run-time improvement
- SIMD and FPU support
- C compiler for GTM/MCS
- Position Independent Code (PIC) and Data (PID)
- Sales and support partner for AUTOSAR libraries from STMicroelectronics
GTM/MCS
C compiler supports GTM/MCS v3.x and v4.x core level and derivatives like:
- Infineon AURIX 2G – TC3xx series
- STMicroelectronics Stellar, SPC58NE84E7, SPC58NE84C3
- NXP S32-series, MPC5777M, MPC58xx
- Renesas RH850/P1H-C, RH850/P1M-C
- and upcoming variants with v4.x GTM core levels
The Assembler supports all core levels of the GTM/MCS (V1 and later)
HighTec’s C/C++ compilers for AURIX, Power Architecture and ARM do include the GTM/MCS assembler in the delivery. The C compiler for GTM/MCS is optionally available as standalone solution.
MetaWare for AURIX
- LLVM base architectures ensures seamless integration with TriCore code
- C/C++ LLVM compiler optimized for the PPU, including extensions for Parallel C
- Extensive mathematical library for the PPU
- Runtime system for the PPU
- Software package for inter-processor communication (IPC) between the PPU and the TriCore multicore architecture with two implementations: a simple bare-metal version and a version as AUTOSAR complex device driver (CDD)
- MATLAB plug-in for generating PPU-optimized code with the Simulink embedded coder,
- xNN software development kit (SDK) for building a neural network for AI/machine learning algorithms
- PPU simulator and debugger
Develop with the best
Advanced Multi-Core Support
