⇒Tools to interact with JTAG devices (e.g. FPGAs, CPLDs or processors)
⇒Introduction to board testing using the JTAG chain
⇒How to describe a circuit in order to enable JTAG testing
⇒How to test non-JTAG elements of a board design using boundary scan
Our goal
to offer a common platform for use by design and development engineers, test engineers, contract manufacturers and field test engineers, providing testing of not only JTAG-enabled devices but non-JTAG devices as well..
Our Mission
XJTAG believes in being open – clients can see and edit the script files that are used to test for non-JTAG devices. If a revised device comes along, or the client has a problem, they can alter or debug the test themselves if they do not wish to (or are unable to) involve XJTAG..
Our Process
XJTAG products use IEEE Std.1149.x (JTAG boundary-scan) to enable engineers to debug, test and program electronic circuits quickly and easily. This can significantly shorten the electronic design, development and manufacturing processes