LDRA integration begins by replicating your CPU’s compiler flags, include paths, and BSP settings within LDRA Testbed to ensure exact parsing and instrumentation. Coverage is collected via probes or trace on the target or simulator, enabling both static and dynamic analysis aligned with builds. This process ensures safety standard compliance like MISRA or Autosar with accurate code coverage metrics. Start with host runs and progress to target hardware for final validation.

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Lauterbach Expands TRACE32 Support for Next-Generation Arm C1 CPUs
Lauterbach has announced full TRACE32® support for the new Arm®v9.3 C1 family of processors —

