𝐀𝐝𝐯𝐚𝐧𝐜𝐢𝐧𝐠 𝐃𝐞𝐛𝐮𝐠 𝐚𝐧𝐝 𝐓𝐫𝐚𝐜𝐞 𝐚𝐭 𝐒𝐲𝐧𝐨𝐩𝐬𝐲𝐬 𝐏𝐫𝐨𝐜𝐞𝐬𝐬𝐨𝐫 𝐈𝐏 𝐒𝐮𝐦𝐦𝐢𝐭 𝟐𝟎𝟐𝟓🚀

We are excited to demonstrate our market leading TRACE32 debug and trace tool support for Synopsys cores at 𝐒𝐲𝐧𝐨𝐩𝐬𝐲𝐬 𝐏𝐫𝐨𝐜𝐞𝐬𝐬𝐨𝐫 𝐈𝐏 𝐒𝐮𝐦𝐦𝐢𝐭 𝐢𝐧 𝐒𝐮𝐧𝐧𝐲𝐯𝐚𝐥𝐞, 𝐂𝐀.

Since last year’s demo featuring the Synopsys ARC-V RMX-100 core alongside ARC-Classic on HAPS, we take it a step further: Visit our booth to experience debug and trace in action with a dual-core RHX-100 setup on HAPS, now enhanced with full RISCV N-Trace capabilities.

With the market-leading TRACE32 debug and trace tools, Lauterbach also supports you during early silicon and software development. Checkout the booth from Elektrobit to see EB tresos AutoCore running on a Synopsys Virtual Development Kit, debugged and traced with TRACE32 featuring OS-aware debugging and tracing of virtual targets.

We look forward to connecting with industry peers at the upcoming summit:
📅 September 3, 2025
⏰ 9:00 AM – 5:15 PM PT
🗺️ Synopsys HQ – Building 1, 800 North Mary Ave Sunnyvale, CA 94085
📝 Register here: https://lnkd.in/d2TjCtYt

𝗘𝘅𝗽𝗹𝗼𝗿𝗲 𝗼𝘂𝗿 𝗱𝗲𝗯𝘂𝗴- 𝗮𝗻𝗱 𝘁𝗿𝗮𝗰𝗲-𝘀𝗼𝗹𝘂𝘁𝗶𝗼𝗻𝘀 𝗳𝗼𝗿 𝗥𝗜𝗦𝗖-𝗩 𝗯𝗮𝘀𝗲𝗱 𝗠𝗖𝗨𝘀, 𝗠𝗣𝗨𝘀 𝗮𝗻𝗱 𝗦𝗢𝗖𝘀 𝗵𝗲𝗿𝗲: https://lnkd.in/dUicKKtk