OVERVIEW
Full Debug and Trace Experience via USB Connection
For targets without physical Debug/Trace interface access—such as devices inside closed chassis—TRACE32® supports silicon IP solutions that enable full debug and trace via USB. This provides low-level target access without needing direct physical connections.
BENEFITS
Full Debug Functionality Without Dedicated Debug Port
TRACE32® USB debugging lets you debug applications where traditional JTAG isn’t feasible—offering the same full features and seamless user experience as our hardware-based solutions.
Enabling Smaller Device Form Factors
Using USB for debugging eliminates the need for extra debug connectors on your PCB, making it ideal for compact devices with tight board space, such as small consumer electronics.
Debug and Trace Targets in Closed Chassis
Unlike JTAG, which requires direct PCB access, TRACE32® enables debugging and tracing via accessible USB ports—ideal for in-field diagnostics and field returns.
Full Features and Seamless Integration
Their USB debugging solution uses the TRACE32® software stack from traditional JTAG tools, providing the full feature set, familiar interface, and consistent behavior. Future updates will maintain compatibility across both USB and JTAG versions.
Enable Fast Tracing
With the high bandwidth of modern USB standards, TRACE32® leverages rapid data transfer rates to support fast and efficient trace capture.
SUPPORTED TECHNOLOGIES
TRACE32 ® Supports Various Technologies for Debug and Trace via USB
In USB-based debugging, TRACE32® communicates with a silicon vendor-specific IP block on the target. This IP decodes USB-transferred debug commands and forwards them through the on-chip infrastructure to the processor cores and other components.
TRACE32® software is split into two layers: the front end issues high-level debug commands, while the back end translates them into low-level, chip-specific instructions to control the target via the IP block.
Tessent Embedded Analytics
Tessent Embedded Analytics over USB
The Tessent Embedded Analytics Ecosystem enables advanced debug and trace via USB using message-based communication through a message engine and Communicators.
Key Features:
Full support for all necessary debug and trace IP blocks
Stop-mode debugging over USB
Multi-core support, even across heterogeneous architectures
OS-aware debugging, including Linux
Core trace and bus monitoring over the USB stack
Intel Direct Connect Interface (DCI) DbC
Arm CoreSight Wire Protocol (CSWP)
The Arm CSWP protocol is a standardized, transport-agnostic solution for debugging and tracing. By integrating Arm’s CoreSight SoC-600 IP, SoCs gain high-bandwidth trace capabilities and memory space access. Communication with PowerView is handled by a CSWP server on the chip.
Key Features:
Full support for required IP blocks
Stop-mode debugging via USB
Multi-core and heterogeneous core debugging
Linux-aware debugging
Core trace over USB
Interfaces Supported
USB
Supported Architectures
ARM
TYPICAL CONFIGURATIONS
Typical TRACE32 Configurations
Tessent Embedded Analytics for 64-bit RISC-V
Debug & Trace your SoC that is equipped with the USB Communicator of the Tessent Embedded Analytics IP.
Intel DCI DbC for Intel x86 Architecture
Debug & Trace your SoC that is equipped with the Intel Direct Connect Interface (DCI).
